{"created":"2023-06-20T15:12:58.249334+00:00","id":9906,"links":{},"metadata":{"_buckets":{"deposit":"40709c74-cc0d-4fc8-91c9-eef1f157d2c9"},"_deposit":{"created_by":3,"id":"9906","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"9906"},"status":"published"},"_oai":{"id":"oai:ynu.repo.nii.ac.jp:00009906","sets":["1006:1009"]},"author_link":["35237","35701","35700"],"item_2_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2019-01-31","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"3","bibliographicVolumeNumber":"32","bibliographic_titles":[{"bibliographic_title":"Superconductor Science and Technology"}]}]},"item_2_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Reversible logic circuits can perform logic operations in a thermodynamically reversible manner, or without energy dissipation. The reversible quantum-flux-parametron (RQFP) is a reversible logic gate using adiabatic superconductor logic. In the present study, we design and demonstrate a reversible full adder (RFA) using RQFP gates in order to demonstrate that RQFP gates can be used as building blocks to design reversible logic circuits. An analysis of the time evolution of the phase differences across the Josephson junctions in the RFA showed that its logic state can change quasi-statically during a logic operation. Calculation of the energy dissipation of the RFA showed that it decreases in proportion to the operating frequency. These numerical calculation results ensure that the RFA is thermodynamically and logically reversible. In addition, we experimentally demonstrated correct operation of the RFA for all input data combinations. These results reveal that logic circuits designed using RQFP gates can perform reversible computing, i.e. RQFP gates can be used as building blocks of reversible logic circuits.","subitem_description_type":"Abstract"}]},"item_2_publisher_35":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IOP Science"}]},"item_2_relation_13":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"https://doi.org/10.1088/1361-6668/aaf8c9","subitem_relation_type_select":"DOI"}}]},"item_2_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA1247275X","subitem_source_identifier_type":"NCID"}]},"item_2_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"13616668","subitem_source_identifier_type":"ISSN"}]},"item_2_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Institute of Advanced Sciences, Yokohama National University / PRESTO, Japan Science and Technology Agency"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University / Institute of Advanced Sciences, Yokohama National University"}]},"item_2_version_type_18":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yamae, Taiki"}],"nameIdentifiers":[{"nameIdentifier":"35700","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Takeuchi, Naoki"}],"nameIdentifiers":[{"nameIdentifier":"35701","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"00746472","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=00746472"}]},{"creatorNames":[{"creatorName":"Yoshikawa, Nobuyuki"}],"nameIdentifiers":[{"nameIdentifier":"35237","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70202398","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70202398"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2020-01-31"}],"displaytype":"detail","filename":"SUST_yamae_reversible full adder_final.pdf","filesize":[{"value":"882.9 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"SUST_yamae_reversible full adder_final.pdf","url":"https://ynu.repo.nii.ac.jp/record/9906/files/SUST_yamae_reversible full adder_final.pdf"},"version_id":"cd411823-c970-4bb7-b3eb-cfe807b27a9e"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"A reversible full adder using adiabatic superconductor logic","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A reversible full adder using adiabatic superconductor logic"}]},"item_type_id":"2","owner":"3","path":["1009"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-06-04"},"publish_date":"2019-06-04","publish_status":"0","recid":"9906","relation_version_is_last":true,"title":["A reversible full adder using adiabatic superconductor logic"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-06-20T17:43:01.724670+00:00"}