{"created":"2023-06-20T15:12:49.153377+00:00","id":9691,"links":{},"metadata":{"_buckets":{"deposit":"2ce5ae71-1e5f-46ad-b9b1-14d0dd38d0fd"},"_deposit":{"created_by":3,"id":"9691","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"9691"},"status":"published"},"_oai":{"id":"oai:ynu.repo.nii.ac.jp:00009691","sets":["495:496"]},"author_link":["35236","35237","19078"],"item_2_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2019-08","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"5","bibliographicPageStart":"1301805","bibliographicVolumeNumber":"29","bibliographic_titles":[{"bibliographic_title":"IEEE Transactions on Applied Superconductivity"}]}]},"item_2_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"We designed several single flux quantum (SFQ) flip-flops and logic gates composed of Josephson junctions (JJs) and π-shifted JJs (π-JJs) to quantitatively evaluate effectiveness of intro-duction of π-JJs into the SFQ logic circuit. One-output flip-flops and logic gates were designed on the basis of the circuit design methodology we built for the SFQ circuit containing π-JJs. The de-signed flip-flops and logic gates have wide operating margins, the dc bias margins of larger than ±30% and device parameter mar-gins of ±18%, though the static power consumption are reduced compared to conventional ones composed of JJs. We found that the difference in the critical current density between JJs and π-JJs does not affect the operating margins of the SFQ flip-flop com-posed of JJs and π-JJs. We devised a circuit structure of the delay flip-flop with complementary outputs composed of JJs and π-JJs (π-DFFC). The analog circuit simulation shows the dc-bias margin of the π-DFFC is larger than ±33%. These results indicate that the large-scale SFQ logic circuit system can be implemented using the flip-flops and logic gates containing π-JJs.","subitem_description_type":"Abstract"}]},"item_2_publisher_35":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_2_relation_13":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"info:doi/10.1109/TASC.2019.2904700","subitem_relation_type_select":"DOI"}}]},"item_2_rights_14":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"© 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works."}]},"item_2_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11946236","subitem_source_identifier_type":"NCID"}]},"item_2_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"10518223","subitem_source_identifier_type":"ISSN"}]},"item_2_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"}]},"item_2_version_type_18":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Yamanashi, Yuki"}],"nameIdentifiers":[{"nameIdentifier":"19078","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70467059","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70467059"}]},{"creatorNames":[{"creatorName":"Nakaishi, Sotaro"}],"nameIdentifiers":[{"nameIdentifier":"35236","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Yoshikawa, Nobuyuki"}],"nameIdentifiers":[{"nameIdentifier":"35237","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70202398","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70202398"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2019-04-15"}],"displaytype":"detail","filename":"Yamanashi2019IEEE.pdf","filesize":[{"value":"735.6 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"Yamanashi2019IEEE.pdf","url":"https://ynu.repo.nii.ac.jp/record/9691/files/Yamanashi2019IEEE.pdf"},"version_id":"e0720be7-e711-4f9b-8cb7-3515ee880f96"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Single-flux-quantum (SFQ) circuit","subitem_subject_scheme":"Other"},{"subitem_subject":"π-shifted Josephson junction","subitem_subject_scheme":"Other"},{"subitem_subject":"flip-flop","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Simulation of the Margins in Single Flux Quantum Circuits Containing π-Shifted Josephson Junctions","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Simulation of the Margins in Single Flux Quantum Circuits Containing π-Shifted Josephson Junctions"}]},"item_type_id":"2","owner":"3","path":["496"],"pubdate":{"attribute_name":"公開日","attribute_value":"2019-04-15"},"publish_date":"2019-04-15","publish_status":"0","recid":"9691","relation_version_is_last":true,"title":["Simulation of the Margins in Single Flux Quantum Circuits Containing π-Shifted Josephson Junctions"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-06-20T18:22:39.560541+00:00"}