{"created":"2023-06-20T15:12:05.228496+00:00","id":8787,"links":{},"metadata":{"_buckets":{"deposit":"a36a6f23-47d2-4c3a-90d0-a37178ee6940"},"_deposit":{"created_by":3,"id":"8787","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"8787"},"status":"published"},"_oai":{"id":"oai:ynu.repo.nii.ac.jp:00008787","sets":["495:496"]},"author_link":["33483","19078","33482"],"item_2_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2016-12","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"8","bibliographicPageStart":"1301405","bibliographicVolumeNumber":"26","bibliographic_titles":[{"bibliographic_title":"IEEE Transactions on Applied Superconductivity"}]}]},"item_2_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"We propose a new inductive- and resistive- (LR) biased low-power single-flux quantum (SFQ) circuit that has a dynamic resetting mechanism of the bias current. Because the bias current returns to the initial state rapidly by switching of a Josephson junction in the bias circuit after circuit operation, the operating frequency of the LR-biased SFQ circuit can be improved. We simulated a Josephson transmission line (JTL) that employs the proposed biasing scheme and evaluated the bias current recovery time. Circuit simulation results show that the bias current recovery time of the proposed circuit is improved by 10-20% compared to that of the conventional LR-biased JTL. We have designed and measured a 10-stage JTL and an 8-bit concurrent-flow shift register (SR) with the proposed biasing scheme. We have experimentally demonstrated operation of the JTL with the bias margin of ±29.4% at the operating frequency of up to 70.4 GHz and operation of the 8-bit SR up to 12.3 GHz by the on-chip high-speed test.","subitem_description_type":"Abstract"}]},"item_2_publisher_35":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Institute of Electrical and Electronics Engineers "}]},"item_2_relation_13":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"info:doi/10.1109/TASC.2016.2598766 ","subitem_relation_type_select":"DOI"}}]},"item_2_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"15582515","subitem_source_identifier_type":"ISSN"}]},"item_2_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"}]},"item_2_version_type_18":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tsutsumi, Ryuta"}],"nameIdentifiers":[{"nameIdentifier":"33482","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Sato, Koji"}],"nameIdentifiers":[{"nameIdentifier":"33483","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Yamanashi, Yuki"}],"nameIdentifiers":[{"nameIdentifier":"19078","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70467059","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70467059"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2018-01-24"}],"displaytype":"detail","filename":"Tsutsumi2016IEEE_final.pdf","filesize":[{"value":"876.0 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"Tsutsumi2016IEEE_final.pdf","url":"https://ynu.repo.nii.ac.jp/record/8787/files/Tsutsumi2016IEEE_final.pdf"},"version_id":"59c9a006-485e-42fd-bf5c-1baa586db7d1"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Improvement of Operation Speed of LR-Biased Low-Power Single-Flux Quantum Circuits by Introduction of Dynamic Resetting of Bias Currents","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Improvement of Operation Speed of LR-Biased Low-Power Single-Flux Quantum Circuits by Introduction of Dynamic Resetting of Bias Currents"}]},"item_type_id":"2","owner":"3","path":["496"],"pubdate":{"attribute_name":"公開日","attribute_value":"2018-01-24"},"publish_date":"2018-01-24","publish_status":"0","recid":"8787","relation_version_is_last":true,"title":["Improvement of Operation Speed of LR-Biased Low-Power Single-Flux Quantum Circuits by Introduction of Dynamic Resetting of Bias Currents"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-06-20T20:02:54.750806+00:00"}