{"created":"2023-06-20T15:14:43.116728+00:00","id":12021,"links":{},"metadata":{"_buckets":{"deposit":"95126e0e-52b3-41fa-9123-6868ab7d1885"},"_deposit":{"created_by":3,"id":"12021","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"12021"},"status":"published"},"_oai":{"id":"oai:ynu.repo.nii.ac.jp:00012021","sets":["1006:1009"]},"author_link":["42943","42945","42944"],"item_2_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2022-06-01","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"6","bibliographicPageEnd":"276","bibliographicPageStart":"270","bibliographicVolumeNumber":"E105.C","bibliographic_titles":[{"bibliographic_title":"IEICE Transactions on Electronics"}]}]},"item_2_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"Extremely energy-efficient logic devices are required for future low-power high-performance computing systems. Superconductor electronic technology has a number of energy-efficient logic families. Among them is the adiabatic quantum-flux-parametron (AQFP) logic family, which adiabatically switches the quantum-flux-parametron (QFP) circuit when it is excited by an AC power-clock. When compared to state-of-the-art CMOS technology, AQFP logic circuits have the advantage of relatively fast clock rates (5 GHz to 10 GHz) and 5 - 6 orders of magnitude reduction in energy before cooling overhead. We have been developing extremely energy-efficient computing processor components using the AQFP. The adder is the most basic computational unit and is important in the development of a processor. In this work, we designed and measured a 16-bit parallel prefix carry look-ahead Kogge-Stone adder (KSA). We fabricated the circuit using the AIST 10 kA/cm2 High-speed STandard Process (HSTP). Due to a malfunction in the measurement system, we were not able to confirm the complete operation of the circuit at the low frequency of 100 kHz in liquid He, but we confirmed that the outputs that we did observe are correct for two types of tests: (1) critical tests and (2) 110 random input tests in total. The operation margin of the circuit is wide, and we did not observe any calculation errors during measurement.","subitem_description_type":"Abstract"}]},"item_2_publisher_35":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"Institute of Electronics, Information and Communication Engineers"}]},"item_2_relation_13":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isIdenticalTo","subitem_relation_type_id":{"subitem_relation_type_id_text":"info:doi/10.1587/transele.2021SEP0001","subitem_relation_type_select":"DOI"}}]},"item_2_relation_44":{"attribute_name":"関係URI","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"https://doi.org/10.1587/transele.2021SEP0001"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"https://doi.org/10.1587/transele.2021SEP0001","subitem_relation_type_select":"DOI"}}]},"item_2_rights_14":{"attribute_name":"権利","attribute_value_mlt":[{"subitem_rights":"Copyright(C)2022 IEICE"}]},"item_2_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA10826283","subitem_source_identifier_type":"NCID"}]},"item_2_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"17451353","subitem_source_identifier_type":"ISSN"}]},"item_2_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Institute of Advancde Sciences, Yokohama National University"},{"subitem_text_value":"Institute of Advancde Sciences, Yokohama National University"}]},"item_2_version_type_18":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_970fb48d4fbd8a85","subitem_version_type":"VoR"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Tomoyuki, TANAKA"}],"nameIdentifiers":[{"nameIdentifier":"42943","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Christopher, L. AYALA"}],"nameIdentifiers":[{"nameIdentifier":"42944","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Nobuyuki, YOSHIKAWA"}],"nameIdentifiers":[{"nameIdentifier":"42945","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70202398","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70202398"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2022-07-04"}],"displaytype":"detail","filename":"e105-c_6_270.pdf","filesize":[{"value":"2.7 MB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"e105-c_6_270.pdf","url":"https://ynu.repo.nii.ac.jp/record/12021/files/e105-c_6_270.pdf"},"version_id":"7ce85a03-965f-47ee-b3eb-e4d6f36b7f8e"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"superconductor logic circuit","subitem_subject_scheme":"Other"},{"subitem_subject":"adiabatic quantum-flux-parametron","subitem_subject_scheme":"Other"},{"subitem_subject":"Kogge-Stone adder","subitem_subject_scheme":"Other"},{"subitem_subject":"superconductor electronics","subitem_subject_scheme":"Other"},{"subitem_subject":"digital circuits","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"A 16-Bit Parallel Prefix Carry Look-Ahead Kogge-Stone Adder Implemented in Adiabatic Quantum-Flux-Parametron Logic","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"A 16-Bit Parallel Prefix Carry Look-Ahead Kogge-Stone Adder Implemented in Adiabatic Quantum-Flux-Parametron Logic"}]},"item_type_id":"2","owner":"3","path":["1009"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-07-04"},"publish_date":"2022-07-04","publish_status":"0","recid":"12021","relation_version_is_last":true,"title":["A 16-Bit Parallel Prefix Carry Look-Ahead Kogge-Stone Adder Implemented in Adiabatic Quantum-Flux-Parametron Logic"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-06-20T17:44:45.028664+00:00"}