{"created":"2023-06-20T15:14:26.404577+00:00","id":11588,"links":{},"metadata":{"_buckets":{"deposit":"7cb19909-ed34-43f0-b27a-ebad48cd82f3"},"_deposit":{"created_by":3,"id":"11588","owners":[3],"pid":{"revision_id":0,"type":"depid","value":"11588"},"status":"published"},"_oai":{"id":"oai:ynu.repo.nii.ac.jp:00011588","sets":["495:496"]},"author_link":["35237","19078","40878"],"item_2_biblio_info_8":{"attribute_name":"書誌情報","attribute_value_mlt":[{"bibliographicIssueDates":{"bibliographicIssueDate":"2022-01-04","bibliographicIssueDateType":"Issued"},"bibliographicIssueNumber":"4","bibliographicPageStart":"1300305","bibliographicVolumeNumber":"32","bibliographic_titles":[{"bibliographic_title":"IEEE Transactions on Applied Superconductivity"}]}]},"item_2_description_5":{"attribute_name":"抄録","attribute_value_mlt":[{"subitem_description":"We design a binary convolution operation circuit (BCOC) using a single-flux-quantum circuit for high-speed and energy-efficient neural network. The proposed circuit is used for binary convolution operations using a convolution kernel size of 3 × 3, which accelerates the forward propagation process of a binary neural network (BNN). We analyze the binary convolution process and propose a bisection method for optimization. The BCOC is designed with a gate-level pipeline architecture and uses the bisection method for reduced number of pipeline stages. Thus, the circuit area of the BCOC is reduced by approximately 50% compared with that of a BCOC without the bisection method. We design the BCOC with 3270 Josephson junctions using a 10 kA/cm^2 Nb process. The measurement results show that the BCOC can perform binary convolution operations with a kernel size of 3 × 3. Compared to a CMOS circuit, BCOC increases the power efficiency by 3.9 times. In future research, we will build up a library of BNNs based on SFQ circuits to simulate various BNN structures.","subitem_description_type":"Abstract"}]},"item_2_publisher_35":{"attribute_name":"出版者","attribute_value_mlt":[{"subitem_publisher":"IEEE"}]},"item_2_relation_13":{"attribute_name":"DOI","attribute_value_mlt":[{"subitem_relation_type":"isVersionOf","subitem_relation_type_id":{"subitem_relation_type_id_text":"info:doi/10.1109/TASC.2022.3140286","subitem_relation_type_select":"DOI"}}]},"item_2_relation_44":{"attribute_name":"関係URI","attribute_value_mlt":[{"subitem_relation_name":[{"subitem_relation_name_text":"https://doi.org/10.1109/TASC.2022.3140286"}],"subitem_relation_type_id":{"subitem_relation_type_id_text":"https://doi.org/10.1109/TASC.2022.3140286","subitem_relation_type_select":"DOI"}}]},"item_2_source_id_11":{"attribute_name":"書誌レコードID","attribute_value_mlt":[{"subitem_source_identifier":"AA11946236","subitem_source_identifier_type":"NCID"}]},"item_2_source_id_9":{"attribute_name":"ISSN","attribute_value_mlt":[{"subitem_source_identifier":"10518223","subitem_source_identifier_type":"ISSN"}]},"item_2_text_4":{"attribute_name":"著者所属","attribute_value_mlt":[{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"},{"subitem_text_value":"Department of Electrical and Computer Engineering, Yokohama National University"}]},"item_2_version_type_18":{"attribute_name":"著者版フラグ","attribute_value_mlt":[{"subitem_version_resource":"http://purl.org/coar/version/c_ab4af688f83e57aa","subitem_version_type":"AM"}]},"item_creator":{"attribute_name":"著者","attribute_type":"creator","attribute_value_mlt":[{"creatorNames":[{"creatorName":"Zongyuan, Li"}],"nameIdentifiers":[{"nameIdentifier":"40878","nameIdentifierScheme":"WEKO"}]},{"creatorNames":[{"creatorName":"Yuki Yamanashi"}],"nameIdentifiers":[{"nameIdentifier":"19078","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70467059","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70467059"}]},{"creatorNames":[{"creatorName":"Nobuyuki Yoshikawa"}],"nameIdentifiers":[{"nameIdentifier":"35237","nameIdentifierScheme":"WEKO"},{"nameIdentifier":"70202398","nameIdentifierScheme":"e-Rad","nameIdentifierURI":"https://kaken.nii.ac.jp/ja/search/?qm=70202398"}]}]},"item_files":{"attribute_name":"ファイル情報","attribute_type":"file","attribute_value_mlt":[{"accessrole":"open_date","date":[{"dateType":"Available","dateValue":"2023-01-04"}],"displaytype":"detail","filename":"Li2022IEEE.pdf","filesize":[{"value":"668.4 kB"}],"format":"application/pdf","licensetype":"license_note","mimetype":"application/pdf","url":{"label":"Li2022IEEE.pdf","url":"https://ynu.repo.nii.ac.jp/record/11588/files/Li2022IEEE.pdf"},"version_id":"c104bde2-3b59-4448-98c3-b0908398670d"}]},"item_keyword":{"attribute_name":"キーワード","attribute_value_mlt":[{"subitem_subject":"Convolution","subitem_subject_scheme":"Other"},{"subitem_subject":"Logic gates","subitem_subject_scheme":"Other"},{"subitem_subject":"Kernel","subitem_subject_scheme":"Other"},{"subitem_subject":"Pipelines","subitem_subject_scheme":"Other"},{"subitem_subject":"Power demand","subitem_subject_scheme":"Other"},{"subitem_subject":"Hardware","subitem_subject_scheme":"Other"},{"subitem_subject":"Pipeline processing","subitem_subject_scheme":"Other"},{"subitem_subject":"Single-flux-quantum (SFQ) circuit","subitem_subject_scheme":"Other"},{"subitem_subject":"binary convolution","subitem_subject_scheme":"Other"},{"subitem_subject":"superconducting integrated circuit","subitem_subject_scheme":"Other"}]},"item_language":{"attribute_name":"言語","attribute_value_mlt":[{"subitem_language":"eng"}]},"item_resource_type":{"attribute_name":"資源タイプ","attribute_value_mlt":[{"resourcetype":"journal article","resourceuri":"http://purl.org/coar/resource_type/c_6501"}]},"item_title":"Design of Binary Convolution Operation Circuit for Binarized Neural Networks Using Single-Flux-Quantum Circuit","item_titles":{"attribute_name":"タイトル","attribute_value_mlt":[{"subitem_title":"Design of Binary Convolution Operation Circuit for Binarized Neural Networks Using Single-Flux-Quantum Circuit"}]},"item_type_id":"2","owner":"3","path":["496"],"pubdate":{"attribute_name":"公開日","attribute_value":"2022-02-08"},"publish_date":"2022-02-08","publish_status":"0","recid":"11588","relation_version_is_last":true,"title":["Design of Binary Convolution Operation Circuit for Binarized Neural Networks Using Single-Flux-Quantum Circuit"],"weko_creator_id":"3","weko_shared_id":3},"updated":"2023-06-20T17:53:45.667986+00:00"}