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Study on Single Flux Quantum Floating-Point Divider Based on Goldschmidt’s Algorithm
http://hdl.handle.net/10131/00012361
http://hdl.handle.net/10131/000123613309ad42-e682-4925-b656-91ff40cf9612
名前 / ファイル | ライセンス | アクション |
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Sanada2019IEEE_final.pdf (2.4 MB)
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2019-04-15 | |||||
タイトル | ||||||
タイトル | Study on Single Flux Quantum Floating-Point Divider Based on Goldschmidt’s Algorithm | |||||
言語 | ||||||
言語 | eng | |||||
キーワード | ||||||
主題 | single-flux quantum logic, superconducting integrated circuits, Goldschmidt’s division algorithm | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
著者 |
Sanada, Akiyoshi
× Sanada, Akiyoshi× Yamanashi, Yuki× Yoshikawa, Nobuyuki |
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著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | We investigated a Goldschmidt’s single flux quantum (SFQ) floating-point divider that is suitable for the implementation using the bit-serial pipelined SFQ circuit. We designed the bit-serial SFQ divider that outputs the 11-bit quotient. The simulation results show correct operation at the frequency of 50 GHz and bias margin of 80-125%. We also estimated dependence of latency and the number of Josephson junctions on accuracy of outputs. According to the estimation, double-precision SFQ divider can be designed using 27000 Josephson junctions, which can be implemented on one chip using the current SFQ circuit fabrication technology. Because of the small circuit area and multiplier-based hardware architecture, the investigated divider can be applied to build an SFQ graphical processing unit. | |||||
書誌情報 |
IEEE Transactions on Applied Superconductivity 巻 29, 号 5, p. 1301904, 発行日 2019-08 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 10518223 | |||||
書誌レコードID | ||||||
収録物識別子タイプ | NCID | |||||
収録物識別子 | AA11946236 | |||||
DOI | ||||||
関連タイプ | isVersionOf | |||||
識別子タイプ | DOI | |||||
関連識別子 | info:doi/10.1109/TASC.2019.2902800 | |||||
権利 | ||||||
権利情報 | © 2019 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. | |||||
著者版フラグ | ||||||
出版タイプ | AM | |||||
出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||
出版者 | ||||||
出版者 | IEEE |