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{"_buckets": {"deposit": "0abaca7f-eec2-45ab-bdb3-790a6e46234c"}, "_deposit": {"created_by": 3, "id": "8790", "owners": [3], "pid": {"revision_id": 0, "type": "depid", "value": "8790"}, "status": "published"}, "_oai": {"id": "oai:ynu.repo.nii.ac.jp:00008790", "sets": ["496"]}, "author_link": ["33493", "33491", "19078"], "item_2_biblio_info_8": {"attribute_name": "書誌情報", "attribute_value_mlt": [{"bibliographicIssueDates": {"bibliographicIssueDate": "2015-06", "bibliographicIssueDateType": "Issued"}, "bibliographicIssueNumber": "3", "bibliographicPageStart": "1301605", "bibliographicVolumeNumber": "25", "bibliographic_titles": [{"bibliographic_title": "IEEE Transactions on Applied Superconductivity"}]}]}, "item_2_description_5": {"attribute_name": "抄録", "attribute_value_mlt": [{"subitem_description": "We investigated a single flux quantum (SFQ) multiinput merger composed of Josephson transmission lines (JTLs), a dc-SQUID stack magnetically coupled to the JTLs, and a dc/SFQ converter. The new merger can more efficiently merge many input signals than a conventional merger circuit, which is a two-input SFQ confluence buffer (CB). In this paper, we optimized and designed the multi-input merger according to an analog circuit simulation. The circuit simulation results show that the merger using up to 16 inputs can correctly operate. We implemented the test circuit and demonstrated a high-speed operation of a four-input merger at an input frequency of up to 23.3 GHz. We evaluated the delay time and the circuit scale of a practical multi-input merging circuit using the newly designed merger and the conventional merging circuit for an SFQ memory system. If we design a 4096-input merging circuit using a 16-input merger circuit tree, we can reduce the delay time, the number of Josephson junctions (JJs), and the total power dissipation of the merging circuit compared with the merging circuit based on a conventional CB tree. The reduction rates of the delay, the JJs, and the total power are approximately 11%, 35%, and 53%, respectively.", "subitem_description_type": "Abstract"}]}, "item_2_publisher_35": {"attribute_name": "出版者", "attribute_value_mlt": [{"subitem_publisher": "Institute of Electrical and Electronics Engineers "}]}, "item_2_relation_13": {"attribute_name": "DOI", "attribute_value_mlt": [{"subitem_relation_type": "isVersionOf", "subitem_relation_type_id": {"subitem_relation_type_id_text": "info:doi/10.1109/TASC.2015.2398675", "subitem_relation_type_select": "DOI"}}]}, "item_2_source_id_9": {"attribute_name": "ISSN", "attribute_value_mlt": [{"subitem_source_identifier": "15582515", "subitem_source_identifier_type": "ISSN"}]}, "item_2_text_4": {"attribute_name": "著者所属", "attribute_value_mlt": [{"subitem_text_value": "Department of Electrical and Computer Engineering, Yokohama National University"}, {"subitem_text_value": "Department of Electrical and Computer Engineering, Yokohama National University"}, {"subitem_text_value": "Department of Electrical and Computer Engineering, Yokohama National University"}]}, "item_2_version_type_18": {"attribute_name": "著者版フラグ", "attribute_value_mlt": [{"subitem_version_resource": "http://purl.org/coar/version/c_ab4af688f83e57aa", "subitem_version_type": "AM"}]}, "item_creator": {"attribute_name": "著者", "attribute_type": "creator", "attribute_value_mlt": [{"creatorNames": [{"creatorName": "Sato, Koji"}], "nameIdentifiers": [{"nameIdentifier": "33491", "nameIdentifierScheme": "WEKO"}]}, {"creatorNames": [{"creatorName": "Yamanashi, Yuki"}], "nameIdentifiers": [{"nameIdentifier": "19078", "nameIdentifierScheme": "WEKO"}, {"nameIdentifier": "70467059", "nameIdentifierScheme": "e-Rad", "nameIdentifierURI": "https://kaken.nii.ac.jp/ja/search/?qm=70467059"}]}, {"creatorNames": [{"creatorName": "Yoshikawa, Nobuyuki"}], "nameIdentifiers": [{"nameIdentifier": "33493", "nameIdentifierScheme": "WEKO"}]}]}, "item_files": {"attribute_name": "ファイル情報", "attribute_type": "file", "attribute_value_mlt": [{"accessrole": "open_date", "date": [{"dateType": "Available", "dateValue": "2018-01-24"}], "displaytype": "detail", "download_preview_message": "", "file_order": 0, "filename": "Sato2015IEEE_final.pdf", "filesize": [{"value": "656.2 kB"}], "format": "application/pdf", "future_date_message": "", "is_thumbnail": false, "licensetype": "license_free", "mimetype": "application/pdf", "size": 656200.0, "url": {"label": "Sato2015IEEE_final.pdf", "url": "https://ynu.repo.nii.ac.jp/record/8790/files/Sato2015IEEE_final.pdf"}, "version_id": "41bec67b-e97d-4bdf-85d6-93dfceb5b6b2"}]}, "item_language": {"attribute_name": "言語", "attribute_value_mlt": [{"subitem_language": "eng"}]}, "item_resource_type": {"attribute_name": "資源タイプ", "attribute_value_mlt": [{"resourcetype": "journal article", "resourceuri": "http://purl.org/coar/resource_type/c_6501"}]}, "item_title": "High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack", "item_titles": {"attribute_name": "タイトル", "attribute_value_mlt": [{"subitem_title": "High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack"}]}, "item_type_id": "2", "owner": "3", "path": ["496"], "permalink_uri": "http://hdl.handle.net/10131/00011464", "pubdate": {"attribute_name": "公開日", "attribute_value": "2018-01-24"}, "publish_date": "2018-01-24", "publish_status": "0", "recid": "8790", "relation": {}, "relation_version_is_last": true, "title": ["High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack"], "weko_shared_id": 3}
High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack
http://hdl.handle.net/10131/00011464
http://hdl.handle.net/10131/00011464e146d429-4135-42d8-95a9-a2df8f927d99
名前 / ファイル | ライセンス | アクション |
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Sato2015IEEE_final.pdf (656.2 kB)
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Item type | 学術雑誌論文 / Journal Article(1) | |||||
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公開日 | 2018-01-24 | |||||
タイトル | ||||||
タイトル | High-Speed Operation of a Single Flux Quantum Multiple Input Merger Using a Magnetically Coupled SQUID Stack | |||||
言語 | ||||||
言語 | eng | |||||
資源タイプ | ||||||
資源タイプ識別子 | http://purl.org/coar/resource_type/c_6501 | |||||
資源タイプ | journal article | |||||
著者 |
Sato, Koji
× Sato, Koji× Yamanashi, Yuki× Yoshikawa, Nobuyuki |
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著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
著者所属 | ||||||
Department of Electrical and Computer Engineering, Yokohama National University | ||||||
抄録 | ||||||
内容記述タイプ | Abstract | |||||
内容記述 | We investigated a single flux quantum (SFQ) multiinput merger composed of Josephson transmission lines (JTLs), a dc-SQUID stack magnetically coupled to the JTLs, and a dc/SFQ converter. The new merger can more efficiently merge many input signals than a conventional merger circuit, which is a two-input SFQ confluence buffer (CB). In this paper, we optimized and designed the multi-input merger according to an analog circuit simulation. The circuit simulation results show that the merger using up to 16 inputs can correctly operate. We implemented the test circuit and demonstrated a high-speed operation of a four-input merger at an input frequency of up to 23.3 GHz. We evaluated the delay time and the circuit scale of a practical multi-input merging circuit using the newly designed merger and the conventional merging circuit for an SFQ memory system. If we design a 4096-input merging circuit using a 16-input merger circuit tree, we can reduce the delay time, the number of Josephson junctions (JJs), and the total power dissipation of the merging circuit compared with the merging circuit based on a conventional CB tree. The reduction rates of the delay, the JJs, and the total power are approximately 11%, 35%, and 53%, respectively. | |||||
書誌情報 |
IEEE Transactions on Applied Superconductivity 巻 25, 号 3, p. 1301605, 発行日 2015-06 |
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ISSN | ||||||
収録物識別子タイプ | ISSN | |||||
収録物識別子 | 15582515 | |||||
DOI | ||||||
関連タイプ | isVersionOf | |||||
識別子タイプ | DOI | |||||
関連識別子 | info:doi/10.1109/TASC.2015.2398675 | |||||
著者版フラグ | ||||||
出版タイプ | AM | |||||
出版タイプResource | http://purl.org/coar/version/c_ab4af688f83e57aa | |||||
出版者 | ||||||
出版者 | Institute of Electrical and Electronics Engineers |